Digital Voice Systems AMBE-3000 Spezifikationen PDF herunterladen (Seite 59)

AMBE-3000F™ Vocoder Chip Users Manual

Version 3.4, April, 2014

O Management

Figure 32 Timing of McBSP When Selected as Codec Interface

No. Parameter MIN MAX

N=8 N=16

M1 Cycle time, for McBSP_CLK(X/R) 300 ns 16 µs 8 µs

M2 Pulse duration, for McBSP_CLK(X/R) High

150 ns

8 µs 4 µs

M3 Pulse duration, for McBSP_CLK(X/R) Low

150 ns

8 µs 4 µs

M4 Rise Time, for McBSP_CLK(X/R) 7 ns

M5 Fall Time, for McBSP_CLK(X/R) 7 ns

M6 Hold time McBSP_RXD valid after McBSP_CLK(X/R) high 6 ns

M7 Setup time McBSP_FS(X/R) valid before McBSP_CLK(X/R) high 2 ns

M8 Hold time McBSP_FS(X/R) high after McBSP_CLK(X/R) high 6 ns

Table 22 McBSP Codec Interface Timing

5.7.2 McBSP Selected for Packet Interface

If the McBSP is selected for the packet interface, packets are transmitted using data pin McBSP_TXD, clock pin

McBSP_CLKX, and framing pin McBSP_FSX. Packets are received using data pin McBSP_RXD, clock pin McBSP_CLKR,

and framing pin McBSP_FSR. There are 8 data bits per frame pulse. McBSP_RXD is sampled on the falling edge of

McBSP_CLKR and McBSP_TXD is sampled on the rising edge of McBSP_CLKX. McBSP_CLKR and McBSP_FSR are

inputs. McBSP_CLKX, McBSP_FSX are outputs. The clock frequency on McBSP_CLKX is determined from

S_COM_RATE(2-0) as shown in Table 24 McBSP Clock Rates.

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Digital Voice Systems AMBE-3000 Spezifikationen Seite 59