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AMBE-3000F™ Vocoder Chip Users Manual
Version 3.4, April, 2014
Dat
a and Configuration Packets
h
ardware setting or the software setting for each pin is used. If all The MASK bits are 0, then no software configuration is
used and the packet behaves the same as a PKT_RESET packet (all the configuration settings come from the hardware pins at
reset). If all the MASK bits are 1, then all the configuration pins are ignored upon the resulting reset and replaced with the
configuration specified by CFG0 – CFG2. It is possible to individually mask the bits and select some configuration to come
from hardware pins and some configuration to come from CFG0-CFG2.
CFG Byte Bit Configuration Description Pin Number
TQFP BGA
0 (LSB) IF_SELECT0 2 C2
1 IF_SELECT1 3 C3
2 IF_SELECT2 4 B1
3 DTX_ENABLE 5 C1
4 SK_ENABLE 6 D3
5 NS_ENABLE 7 D2
6 CP_ENABLE 8 D1
CFG0
7 (MSB) CP_SELECT 9 F5
0 (LSB) RATE0 126 A3
1 RATE1 125 D4
2 RATE2 124 C4
3 RATE3 123 B4
4 RATE4 122 A4
5 RATE5 121 E5
6 EC_ENABLE 120 D5
CFG1
7 (MSB) ES_ENABLE 119 B5
0 (LSB) S_COM_RATE0 89 E13
1 S_COM_RATE1 90 E11
2 S_COM_RATE2 91 F10
3 Reserved
4 PARITY_ENABLE 79 H11
5 Reserved
6 Reserved
CFG2
7 (MSB) Reserved
Table 74 Software Override of Hardware Configuration Pins
For more information regarding configuration pins refer to Table 2 Hardware Configuration Settings
PKT_RESETSOFTCFG Field - Format
Control Field Data
Field Identifier
CFG0 CFG1 CFG2 MASK0 MASK1 MASK2
1 Byte 1 byte 1 byte 1 byte 1 byte 1 byte 1 byte
0x34
Table 75 PKT_RESETSOFTCFG Field
The PKT_RESETSOFTCFG field does not return a Response field; however, the AMBE-3000F™ Vocoder Chip does output a
PKT_READY packet after every reset (including both hard resets and packet resets). The PKT_READY packet can therefore
be viewed as a response packet to the packet containing a PKT_RESETSOFTCFG field.
(Subject to Change) Page 73
DVSI CONFIDENTIAL PROPRIETARY
- AMBE-3000F™ Vocoder Chip 1
- DVSI Confidential Proprietary 1
- (Subject to Change) Page v 5
- (Subject to Change) Page x 10
- 1 Product Introduction 11
- 1.3 Typical Applications 12
- 2 Hardware Information 13
- 2.2 Package Details 14
- (Subject to Change) Page 5 15
- 2.3 Pin Assignment Layouts 16
- A B C D E F G H J K L M N P 17
- (Subject to Change) Page 8 18
- (Subject to Change) Page 9 19
- 2.5 Pin Out Table 20
- PARITY_ENABLE 79 22
- Input Enable parity bit 22
- Table 1 Pinout List 26
- 2.7.1 External Clock Source 29
- 2.7.2 Crystal Oscillator 29
- Table 7 Voltage Supply Pins 32
- 3.6 Reset Behavior 33
- Figure 11 TX_RDY after Reset 34
- Figure 12 Output Levels 34
- 3.8 Power-Down Sequencing: 35
- 3.9 Low Power Modes 35
- 3.9.1 Run State 36
- 3.9.2 Idle State 36
- 3.9.3 Standby State 36
- 3.9.4 Halt State 36
- 3.9.5 Power Modes 37
- 4.2 Interface Selection 40
- 4.4 Vocoder State 41
- Figure 18 Typical Echo Path 43
- Table 11 Companding Control 44
- 5 I/O Management 45
- Table 13 ECMODE_IN Flags 46
- Table 14 ECMODE_OUT FLAGS 46
- Table 15 DCMODE_IN Flags 47
- Table 16 DCMODE_OUT Flags 47
- 5.2 Codec mode 49
- “0 to Transition”“1” 51
- “Packet_ _Zone”Uncertainty 51
- “aperiodic packets” 52
- 5.3 Packet Mode 53
- Figure 29 Packet Mode 55
- 5.5 SPI Interface 56
- 5.6 UART Interface 57
- 5.7 McBSP Interface 58
- 5.8 Parallel Interface 61
- Table 26 PPT Timing 62
- Figure 36 Vocoder Front End 64
- Diagram 66
- 6.1 Overview 68
- 6.2 Codec Mode Operation 68
- 6.3 Packet Mode Operation 68
- 6.4 Packet Interfaces 69
- 6.5 Packet Format 69
- 6.5.3 TYPE (1 byte) 70
- 6.5.4 Packet Fields 70
- Table 59 PKT_CODECSTOP Field 78
- Table 61 PKT_CHANFMT Field 79
- samples dcmode 80
- Table 64 PKT_SPCHFMT Field 80
- 0x54 0x46 0x00 81
- Table 71 PKT_READY Field 82
- Table 72 PKT_HALT Field 82
- Table 73 PKT_RESET Field 82
- 6.7.1 Speech Packet Fields 89
- Table 100 CMODE Field Format 90
- Table 103 TONE Field Format 90
- 6.11 Example Packets 94
- 7 Appendices 98
- Table 115 Rate Index Numbers 100
- 8 Support 103
- Digital Voice Systems, Inc 104
- 10 IC Chip Software Errata 107
- Release 007 09/10/2009 108
- Release 014 08/31/2012 108
- 11 History of Revisions 109
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